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| 5.0 Vdc HCMOS/ TTL COMPATIBLE CERAMIC SURFACE MOUNT CRYSTAL CLOCK OSCILLATORS ASL and ASL1 7.0 x 5.08 x 1.8 mm FEATURES: * * * * Leadless chip carrier (LCC), Low profile. HCMOS and TTL compatible. Tristate Enable /Disable function. Reflow capable. * * * * High density surface-mount applications. Available optional -40C to 85C extended temperature. Packaging: Tape and reel. Seam welding, 1.4 mm max.height.(ASL1) APPLICATIONS: * Provide clock signals for microprocessors, PC mainboards, Graphic cards. * High output drive capability applications. STANDARD SPECIFICATIONS Frequency Range PARAMETERS Operation Mode Frequency Range (Fo) Operating Temperature (TOPR) Operating Temperature Storage Temperature Storage Temperature (TSTO) Frequency Tolerance @ (F F ) 25C Frequency Stability /o Frequency Stability over Temp. Supply Voltage (Vdd) Equivalent Series Resistance Input Maximum (I dd) (ESR)Current 3.5 MHz - 25 MHz SPECIFICATIONS Fundamental, AT- 125MHz 1.00MHz -10C to + 60 C (See Options) -10C to +70C (See Options) -55C to -55C to +125C + 125 C 50 ppm max. (See Options) 100ppm max. (See Options) 50 ppm max. (See Options) 5Vdc 10% 200 for 3.5 MHz < F < 4.0 MHz 25150 for for MHz < F < 6.0 35.0MHz mA max. 4.0 1.0MHz < F < MHz 40 mA max. for 35.0MHz < F < 60.0MHz 100 for 6.0 MHz < F < 10.0 MHz 60 mA max. for 60.0MHz < F < 100MHz 8080 for 10 MHz < F << F < 125MHz mA max. for 100MHz 14.0 MHz _ 50 for 14 MHz < F < 25 MHz 40 /pF max. @ 1/2 Vd d (See Options) 7 60% max. 10ns max. Option) 16 pF (See for 1.0MHz < F < 35.0MHz 5ns max. for 35.0MHz < F < 100.0MHz 100 max. 2.5ns5 pp mfor 100.0MHz < F < 125.0MHz max. max. 500 10TTL or 15pF for F > 70.0MHz M min. at 100 Vdc 15V _ 10TTL or 50pF for F < 70MHz 0.071max. (1.8) Duty Cycle or Symmetry Shunt Capacitance C0 Load Capacitance CL (TR / TF) Rise and Fall Times Drive Level Aging @ 25 C First Year Output Load Insulation Resistance Output Voltage Start-up Time Tristate Function ASL1 H 0.055 Max. (1.40) 0.9 * Vdd min. (Voh); 0.4Vdc max. (Vol) (Tosc) 10ms max. (Vih) "1" or Open: Oscillation _ > 2.2V (Vil) "0":Output disabled in high impedance (Hi Z) < 0.8V Period jitter one sigma 25ps max. * Pin 1 has internal pull-up resistor which allows Pin 1 to be left floating (enable high) A bypass capacitor 0.01 F is required from Vdd to Gnd. Reflow profile, see appendix E. Test circuit, waveforms, please see appendix B. Marking, see appendix G. Environmental and mechanical specifications, see appendix C. Group 2. Application notes, see appendix A. Tape and Reel, see appendix H.(1,000 pcs./reel) ORDERING OPTIONS ASLX - Frequency - Temperature - Overall Freq. Stability - Duty Cycle - 50 - Packaging XX.XXXXX MHz Blank or 1 -I -D -E -F -N -L for -0C for -10C for -20C for -30C for -30C for -40C to to to to to to + 50C + 60C + 70C + 70C + 85C + 85C -Y -J -R -K -H -C for 10ppm max.* for 20ppm max.* for 25ppm max. for 30ppm max. for 35ppm max. for 50ppm max. 50pF load output drive -T (Tape & Reel) Dimensions: Inches (mm) PIN N0. FUNCTION -S for 45 / 55% @ 1 /2Vdd -S1 for 45 / 55% @ 1.4Vdc * Please contact us for availability. 1 2 3 4 Tristate E/D GND / Case Output Vdd ABRACON IS ISO 9001 / QS 9000 CERTIFIED ABRACON 44 Rev. B 01/2003 (R) NOTE: Left blank if standard * All specifications and markings subject to change without notice CORPORATION 29 Journey * Aliso Viejo, CA 92656 * USA (949) 448-7070 * FAX: (949) 448-8484 E-MAIL: abinfo@abracon.com * INTERNET ADDRESS: www.abracon.com |
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